|
How Do I Set the Baud-Rate for the Full UART Soft IP Module? The FastChip development system includes a library of commonly used peripherals. One of the more popular is the Full UART with Modem Control module. The full UART provides full duplex (receive/transmit) communication and has a software-programmable baud rate. One common question is how to set up the UART’s baud-rate generator. The baud is determined by a few factors including … · the bus clock operating frequency, FBUSCLK · the desired baud rate, BAUD · the baud-rate generator divisor value, DIVISOR · the acceptable baud-rate error, %ERROR Calculate appropriate DIVISOR value using the following equation. In most cases, you need to round the result up or down to the closest integer.
The actual baud rate generated using the DIVISOR value may be different than the desired baud rate, because DIVISOR must be rounded to the nearest integer value.
The operating frequency and the integer value for DIVISOR may not provide the precise desired baud rate. Because each bit of the UART is oversampled 16 times and each data transaction re-synchronized, the UART can tolerate slight errors in the baud rate, safely up to 3%. Calculate the percent baud-rate error using the following equation.
Using the equations above, the DIVISOR = 109.7074, but is rounded to the next closest integer, 110.
Using a DIVISOR of 110 results in an actual baud-rate of 18,750 bits per second, which is different than our desired baud rate of 18,800 bits per second.
However, the error is just 0.27% off the desired baud rate, which is well within the acceptable limit of 3%.
The following steps create a new full UART module and specify the initial DIVISOR value.
By default, the internal baud-rate divider is 8 bits wide. You can conserve some resources by reducing the size. However, it must be possible to represent the DIVISOR value in the maximum bit width.
© 2001 by Triscend Corporation. All rights reserved. |